PXD20RM Datasheet, PDF (504/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Offset 0x214
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0
W
DIV_RATIO
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
Figure 12-32. Clock Divider Register (DIV_RATIO)
Table 12-26. DIV_RATIO field descriptions
Field
DIV_RATIO
Description
Specifies the divide value for the input clock. Used to generate the pixel clock to support
different types of displays. To divide by N, set the DIV_RATIO to (N-1).
12.3.4.23 SIGN_CALC_1 register
Figure 12-33 presents the register for vertical/horizontal size of the area for CRC calculation.
Offset 0x218
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0
W
SIG_VER_SIZE
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0
W
SIG_HOR_SIZE
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-33. SIGN_CALC_1 register
Table 12-27. SIGN_CALC_1 field descriptions
Field
Description
SIG_VER_SIZE Vertical size of the window of interest of pixels for CRC calculation (in pixels)
SIG_HOR_SIZE Horizontal size of window of interest of pixels for CRC calculations (in pixels)
12-42
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor