PXD20RM Datasheet, PDF (838/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

21.3.2.14 User Test Register 2 (UT2)
Offset: FLASH_REGS_BASE + 0x0044
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
DAI
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 21-17. User Test Register 2 (UT2)
Table 21-18. UT2 Field Descriptions
Field
DAI
[63:32]
Description
Data Array Input. These bits enable checks of ECC logic by allowing data bits to be input into the ECC logic
and then read out by doing array reads or array integrity checks. The DAI[63:32] correspond to the 32 Array
bits representing Word 1of the double word selected in the ADR register.
21.3.2.15 User Multiple Input Signature Register [0:4] (UMn)
The User Multiple Input Signature Registers (UMn) provide a means to evaluate array integrity.
Offset FLASH_REGS_BASE + 0x0048
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[31:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 21-18. User Multiple Input Signature Register 0 (UM0)
Offset FLASH_REGS_BASE + 0x004C
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[63:32]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 21-19. User Multiple Input Signature Register 1 (UM1)
Offset FLASH_REGS_BASE + 0x0050
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MISR[95:64]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 21-20. User Multiple Input Signature Register 2 (UM2)
21-26
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor