PXD20RM Datasheet, PDF (1258/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

result in the following content of the TX Buffer:
Table 0-2 Example of QuadSPI TX Buffer
TX Buffer Entry
0
1
Content
32’h01_02_03_04
32’h05_06_07_08
Programming the TX Buffer into the external serial flash device results in the following byte order to be
sent to the serial flash:
01...02...03...04...05...06...07...08
35.7.2 Reading Flash Data into the RX Buffer
Reading the content from the same address provides the following sequence of bytes, identical to the write
case:
01...02...03...04...05...06...07...08
This results in the RX Buffer filled with:
Table 35-38. Resulting RX Buffer Content
RX Buffer Entry
0
Content
32’h01_02_03_04
1
32’h05_06_07_08
35.7.2.1 Readout of the RX Buffer via QSPI_RBDRn
The RX Buffer content appears at CPU read access via the IP SkyBlue interface in the following order:
(1) Read QSPI_RBDR0 <- 0x01_02_03_04
(2) Read QSPI_RBDR1 <- 0x05_06_07_08
35.7.2.2 Readout of the RX Buffer via ARDBn
The RX Buffer content appears at read access on the AMBA AHB interface at the QuadSPI module
boundary:
(1a): 32 Bit Access: Read QSPI_ARDB0 <- 0x01_02_03_04
(2a): 32 Bit Access: Read QSPI_ARDB1 <- 0x05_06_07_08
(1b/2b): 64 Bit Access: Read QSPI_ARDB0 <- 0x01_02_03_04_05_06_07_08
35-48
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor