PXD20RM Datasheet, PDF (610/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

14.4.2.5 Lookup table alternate upper registers (ALUTU0–ALUTU4)
Offsets: 0xB4 (ALUTU0)
0xB8 (ALUTU1)
0xBC (ALUTU2)
0xC0 (ALUTU3)
0xC4 (ALUTU4)
read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
PRIO15
W
PRIO14
PRIO13
PRIO12
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
PRIO11
W
PRIO10
PRIO9
PRIO8
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 14-8. ALUTU registers
These registers contain the upper 8 entries of the look-up tables for channels 0 to 4, main table. All registers
contain identical fields. The content of these registers if the “alternate” table is enabled for the particular
LUT.
Table 14-7. ALUTU field descriptions
Field
PRIO15
PRIO14
PRIO13
PRIO12
PRIO11
PRIO10
PRIO9
PRIO8
Description
Priority setting if 15 or more ACK’s for own channel counted
Priority setting if 14 ACK’s for own channel counted
Priority setting if 13 ACK’s for own channel counted
Priority setting if 12 ACK’s for own channel counted
Priority setting if 11 ACK’s for own channel counted
Priority setting if 10 ACK’s for own channel counted
Priority setting if 9 ACK’s for own channel counted
Priority setting if 8 ACK’s for own channel counted
14-10
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor