PXD20RM Datasheet, PDF (158/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Address: Base + 0x0048
Access: User read/write
0
1
2
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4
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9
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15
R _{DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA}
W ^{63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48}
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
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31
R _{DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA}
W ^{47 46 43 44 43 42 41 40 39 38 37 36 35 34 33 32}
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-13. DMA Channel Select Register 1 (DMAR1)
Address: Base + 0x004C
Access: User read/write
0
1
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R _{DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA}
W ^{95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80}
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
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31
R _{DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA DMA}
W ^{79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64}
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-14. DMA Channel Select Register 2 (DMAR2)
Table 5-12. DMA Channel Select Register (DMAR[1..2]) field descriptions
Field
31
n
Description
DMA0: DMA enable
When set (DMA0 = 1), channel 0 is enabled to transfer data in DMA mode.
DMAn: DMA enable
When set (DMAn = 1), channel n is enabled to transfer data in DMA mode.
5.3.5 Threshold registers
5.3.5.1 Introduction
These four registers are used to store the user programmable lower and upper thresholds’ values. The
inverter bit and the mask bit for mask the interrupt are stored in the TRC registers.
5-16
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor