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PXD20RM Datasheet, PDF (827/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller
Offset: FLASH_REGS_BASE + 0x0010
Access: User read/write
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MSEL
Reset 0
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LSEL
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Figure 21-7. Low/Mid Address Space Block Select Register (LMS)
Table 21-8. LMS Field Descriptions
Field
MSEL[1:0]
LSEL[9:0]
Description
Mid Address Space Block Select. A value of 1 in the select register signifies that the block is selected for
erase. A value of 0 in the select register signifies that the block is not selected. The reset value for the select
registers is 0, or un-selected.
The blocks must be selected (or un-selected) before doing an erase interlock write as part of the erase
sequence. The select register is not writable once an interlock write is completed until MCR[DONE] is set at
the completion of the requested operation, or if a high voltage operation is suspended. MSEL is also not
writeable during UTest operations, when AIE is high.
In the event that blocks are not present (due to configuration or total memory size), the corresponding select
bits default to un-selected, and are not writable. The reset value is always 0, and register writes have no
effect.
Low Address Space Block Select. A value of 1 in the select register signifies that the block is selected for
erase. A value of 0 in the select register signifies that the block is not selected. The reset value for the select
registers is 0, or un-selected.
The blocks must be selected (or un-selected) before doing an erase interlock write as part of the erase
sequence. The select register is not writable once an interlock write is completed until MCR[DONE] is set at
the completion of the requested operation, or if a high voltage operation is suspended. LSEL is also not
writeable during UTest operations, when AIE is high.
In the event that blocks are not present (due to configuration or total memory size), the corresponding select
bits default to un-selected, and are not writable. The reset value is always 0, and register writes have no
effect.
21.3.2.6 High Address Space Block Select Register (HBS)
The High Address Space Block Select Register (HBS) provides a means to select blocks to be operated on
during erase.
The HBS register is shown in Figure 21-8 and Table 21-9.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
21-15