PXD20RM Datasheet, PDF (1555/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 47-3. SCR Fields
Field
Description
ECC_EN Enable bit for ECC error reporting. VIU will also trigger interrupt upon detecting one or more errors..
FIELD_IRQ Interrupt status bit. Write ‘1’ to clear FIELD_IRQ.
VSYNC_IRQ Interrupt status bit. Write ‘1’ to clear VSYNC_IRQ.
HSYNC_IRQ Interrupt status bit. Write ‘1’ to clear HSYNC_IRQ.
VSTART_IRQ Interrupt status bit. Write ‘1’ to clear VSTART_IRQ.
DMA_END_IRQ Interrupt status bit. Write ‘1’ to clear DMA_END_IRQ.
ERROR_IRQ Interrupt status bit. Write ‘1’ to clear ERROR_IRQ.
MODE444
YUV 4:4:4 mode enable bit. When it’s set ITU decoder sends out YUV 4:4:4 format data, otherwise YUV 4:2:2
is sent by default. It shall be cleared when down scaling is enabled because the down-scaler works on YUV
4:2:2 format.
BC_EN
Bright/Contrast adjust enable.
RGB_EN YUV to RGB conversion enable.
SCALER_EN Down scaling enable.
DMA_ACT DMA transfer of current field/frame is busy (write by software, cleared at end of transfer). When DMA_ACT
is cleared, input video data is ignored and not put into FIFO.
FIELD_NO Field number, extracted from ITU-656 stream.
DITHER_ON Dithering is on. Used when video data is stored in buffer as RGB565 format and ROUND_ON is not set.
ROUND_ON Round is on. Used when video data is stored in buffer as RGB565 format.
MODE32BIT
Select 32-bit or 16-bit output.
0 : 16-bit RGB or YUV 4:2:2 output
1: 32-bit RGB or YUV 4:4:4 output. DITHER_ON and ROUND_ON are ignored if output is 32-bit RGB.
47.2.3.2 LUMA_COMP
Offset 0x04
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Y_RED[9:0]
W
Y_GREEN[9:5]
Reset 1
0
0
1
0
1
0
1
0
0
0
1
0
0
1
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
Y_GREEN[4:0]
W
Y_BLUE[9:0]
Reset 1
0
1
0
0
0
1
0
0
1
0
1
0
1
0
0
= Unimplemented or Reserved
Figure 47-3. LUMA_COMP Register
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
47-7