PXD20RM Datasheet, PDF (744/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

selected clock
EMIOSI
5-bit counter
IF [0:3]= 0010
Time
filter out
Figure 18-37. Input Programmable Filter Example
The filter is not disabled during freeze state.
18.7.1.3 Clock Prescaler (CP)
The CP divides the GCP output signal to generate a clock enable for the internal counter of the Unified
Channels. The GCP output signal is prescaled by the value defined in Figure 18-14 according to the
UCPRE[0:1] bits in CCR[n]. The prescaler is enabled by setting the UCPREN bit in the CCR[n] and can
be stopped at any time by clearing this bit, thereby stopping the internal counter in the Unified Channel.
In order to ensure safe working and avoid glitches the following steps must be performed whenever any
update in the prescaling rate is desired:
1. Write 0 at both MCR[GPREN] and UCPREN bit in CCR[n], thus disabling prescalers;
2. Write the desired value for prescaling rate at UCPRE[0:1] bits in CCR[n];
3. Enable channel prescaler by writing 1 at UCPREN bit in CCR[n];
4. Enable global prescaler by setting MCR[GPREN].
The prescaler is not disabled during freeze state.
18.7.1.4 Effect of Freeze on the Unified Channel
When in debug mode, MCR[FRZ] and the FREN bit in the CCR[n] are both set, the internal counter and
Unified Channel capture and compare functions are halted. The UC is frozen in its current state.
During freeze, all registers are accessible. When the Unified Channel is operating in an output mode, the
force match functions remain available, allowing the software to force the output to the desired level.
Note that for input modes, any input events that may occur while the channel is frozen are ignored.
When exiting debug mode or freeze enable bit is cleared (MCR[FRZ] or FREN in the CCR[n]) the channel
actions resume, but may be inconsistent until channel enters GPIO mode again.
18.7.2 Global Clock Prescaler Submodule (GCP)
The GCP divides the system clock to generate a clock for the CPs of the channels. The main clock signal
is prescaled by the value defined in Figure 18-8 according to the GPRE[0:7] bits in MCR. The global
18-42
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor