PXD20RM Datasheet, PDF (1078/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 29-7. Interrupt Status Register (ME_IS) Field Descriptions (continued)
Field
I_SAFE
I_MTC
Description
SAFE mode interrupt — This bit is set whenever the device enters SAFE mode on hardware
requests generated in the system. It is cleared by writing a ‘1’ to this bit.
0 No SAFE mode interrupt occurred
1 SAFE mode interrupt is pending
Mode transition complete interrupt — This bit is set whenever the mode transition process
completes (S_MTRANS transits from 1 to 0). It is cleared by writing a ‘1’ to this bit. This mode
transition interrupt bit will not be set while entering low-power modes HALT, STOP, or STANDBY.
0 No mode transition complete interrupt occurred
1 Mode transition complete interrupt is pending
29.3.2.5 Interrupt Mask Register (ME_IM)
Address 0xC3FD_C010
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 29-6. Interrupt Mask Register (ME_IM)
This register controls whether an event generates an interrupt or not.
Table 29-8. Interrupt Mask Register (ME_IM) Field Descriptions
Field
Description
M_ICONF_CU Invalid mode configuration interrupt (Clock Usage) mask
0 Invalid mode configuration (clock usage) interrupt is masked
1 Invalid mode configuration (clock usage) is enabled
M_ICONF
Invalid mode configuration interrupt mask
0 Invalid mode interrupt is masked
1 Invalid mode interrupt is enabled
M_IMODE
M_SAFE
M_MTC
Invalid mode interrupt mask
0 Invalid mode interrupt is masked
1 Invalid mode interrupt is enabled
SAFE mode interrupt mask
0 SAFE mode interrupt is masked
1 SAFE mode interrupt is enabled
Mode transition complete interrupt mask
0 Mode transition complete interrupt is masked
1 Mode transition complete interrupt is enabled
29-20
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor