PXD20RM Datasheet, PDF (565/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Sensor input fed directly to decoder/FPGA,
which converts the data to a format
required by the PDI.
Video
sensor/
camera
output
Decoder/
FPGA
PXD20
Other layer data to
mix with PDI
DCULite
Display
Driver/
Screen
PDI
Data being sent at
PDI rate
PDI output in format
required by DCULite
(PDI becomes BG
layer)
Figure 12-88. PDI interacting with FPGA in between
In the case shown in Figure 12-88, the video stream is sent to a decoder or an FPGA which alters the
incoming stream to a format which is compatible with the PDI. A decoder/FPGA is required if a video
source with an analog output format (e.g. NTSC/PAL) is used. The decoder should perform
analog-to-digital conversion on the stream and ensure the timing match that of the DCULite. The incoming
stream may also need to be de-interlaced.
The PDI is compatible with various input formats:
• Normal Mode: the PDI clock frequency must be equal to pixel clock frequency required by the TFT
display driver
• Narrow Mode: the PDI clock frequency is double the desired pixel clock frequency.
• External Synchronization: The timing signals (HSYNC, VSYNC, and DE) each have a dedicated
input pin. (DE is optional)
• Internal Synchronization: The timing signals (HSYNC, VSYNC and DE) are embedded in the data
stream, as such only the DATA and PCLK inputs are required. (See Section 12.8.1.4, ITU-R
BT.656 sync information extraction.)
Before the DCULite locks onto the PDI timing signals it will run on the internal DCULite clock. After lock
has been achieved, the DCULite will switch to the clock from the PDI stream and the this is then used to
send data and timing signal to TFT/LCD display driver.
In all cases, the resolution of the incoming stream and the HSYNC and VSYNC frequency must be the
same as that for TFT screen. All the horizontal parameters (Front Porch width, Back Porch width, Pulse
width) and vertical parameters (Front Porch width, Back Porch width, Pulse width) must be same as that
of TFT screen.
When PDI is the background layer, no other layer can be a background layer for that particular frame. Only
one background layer is possible i.e. PDI Layer when PDI is enabled.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
12-103