PXD20RM Datasheet, PDF (252/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

8.7.3
Block diagram
CK_FIRC
CK_SIRC
CK_SXOSC
CK_FIRC
CK_FXOSC
CLKSEL1[1:0] CMU_MDR Register
00
01
10
11
MUX 1
Frequency Meter
CMU_FDR
register
Fixed
Prescaler
/4
ckpll_a
FXOSC Supervisor
FOSC < FRC_fast / n
CMU_HREF Register
FPLL > href or
FPLL < FRC_fast / 4
FPLL < lfref
OLR_evt
FXOSC ON/OFF
From MC_ME
FLC_evt_a
FHH_evt_a
PLL ON/OFF
From MC_ME
FLL_evt_a
CMU_LFREF register
PLL Supervisor
Figure 8-36. Clock Monitor Unit diagram
8.7.4 Memory map and register description
The memory map of the CMU is shown in the following table.
Table 8-48. RC Digital Interface Register Set - Base address 0xC3FE_0100
Address Offset Register Name
Location
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
Control Status Register (CMU_CSR)
Frequency Display Register (CMU_FDR)
High Frequency Reference Register FMPLL0(CMU_HFREFR_A)
Low Frequency Reference Register FMPLL0(CMU_LFREFR_A)
Interrupt Status Register (CMU_ISR)
reserved
Measurement Duration Register (CMU_MDR)
on page 8-49
on page 8-50
on page 8-50
on page 8-51
on page 8-51
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on page 8-52
8-56
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor