PXD20RM Datasheet, PDF (497/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 12-23. THRESHOLD field descriptions
Field
Description
LS_BF_VS
Lines before VSYNC threshold value. It is a threshold value used to generate the ls_bf_vs
interrupt status. Sets the number of lines before VSYNC that the interrupt would be generated.
OUT_BUF_HIGH Output buffer filling high threshold (in pixels). It is used to generate the datapath clock enable
signal. Gates the datapath when output buffer filling is higher than OUT_BUF_HIGH.
OUT_BUF_LOW Output buffer filling low Threshold (in pixels).This value is used to generate the underrun
exception.
12.3.4.19 Interrupt Status Register (INT_STATUS)
Figure 12-22 indicates the interrupt status register. The DCULite has only one interrupt signal, and the
CPU reads the INT_STATUS register to decide which exception occurs when an interrupt is detected.
Offset 0x1EC
Access: User read
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
00
W
w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 12-22. Interrupt Status Register (INT_STATUS)
Table 12-24. INT_STATUS field descriptions
Field
Description
DMA_TRANS_FIN Interrupt signal which indicates that the DCULite DMA has fetched the last pixel of data from
ISH
the memory
IPM_ERROR Interrupt signal which indicates that an error has occurred in the Magenta line transaction
PROG_END
Interrupt signal which indicates that the duration for programming of DCULite registers and
internal memories is finished
P2_FIFO_HI_FLA Interrupt signal to indicate that High threshold has been reached for plane 2 (FGplane) input
G
buffer
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
12-35