PXD20RM Datasheet, PDF (461/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

11.9.1.3 Other assumptions
The reset to the PDI clock is synchronized to the peripheral clock. Reset synchronization is done with
respect to the PDI clock internally.
The PDI clock should be available at least 10 clock after the last valid data. This corresponds to the delay
of the PDI block.
11.10 DCU3 initialization
The following steps describe a typical approach to initializing the DCU3 for use in an application.
1. After reset configure the DCU3 peripheral to be active using the mode entry module and configure
the DCU3 clock source in the MC_CGM.
2. If using a panel with an integrated TCON module, disable the TCON signals by setting the
TCON_BYPASS bit in the TCON CTRL1 register. Due to the configuration of the TCON module,
the DCU3 pixel clock signal will be output as soon as it is selected by the SIUL PCR. This is
independent of the DCU3 operating mode.
3. Configure the output ports in the SIUL as required.
4. Configure the timing registers to match the TFT LCD panel in use (Section 11.4.2, TFT LCD panel
configuration).
5. Set the background color as required.
6. Load the initial tile or palette colors into the CLUT/Tile memory
7. Configure the control descriptors for the layers and cursor that are to be used initially
8. Enable the DCU3 in the appropriate mode (DCU_MODE and RASTER_EN bit fields).
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
11-127