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PXD20RM Datasheet, PDF (1532/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller
TCON_COMPx register to “0.” An one cycle (pixel clock cycle, or line cycle) pulse will be generated
when the compare result is match, and the comparison logic is shown below:
compare_out = (TCON_COMPx.COMP_VALUE == (TCON_COMPx_MSK.MASK & hcount ))
or
Eqn. 46-1
compare_out = (TCON_COMPx.COMP_VALUE == (TCON_COMPx_MSK.MASK & vcount )) Eqn. 46-2
TCON_COMPx.FUNC_SEL determines whether Equation 46-1 or Equation 46-2 is used (i.e. comparison
is done on horizontal or vertical direction).
46.4.2.2 Pulse generator
There are 6 pulse generators in the TCON which can be used to generate pulses which have a set point and
a reset point, and the pulse length is discretional. The set and reset point is determined by
TCON_PULSEx.[SET] and TCON_PULSEx.[RESET] (see Section 46.3.3.5, TCON_PULSE0 -
TCON_PULSE5), to which the hcount or vcount value will be compared. If desired the user can mask
some bits from comparing by setting the corresponding bits in both TCON_PULSEx_MSK and
TCON_PULSEx register to 0. The equations used to find the set/clear point are similar to Equation 46-1
or Equation 46-2.
TCON_PULSEx.[FUNC_SEL] controls the type of the pulse, a.k.a. whether the set/reset point
comparison is performed on horizotnal direction (compare with hcount) or vertical direction (compare
with vount). And when vertical comparison is selected (ie. FUNC_SEL = 01 or 11), 1 of the 4 comparator
outputs (must be a horizontal pulse) can be selected to further determine the signal transition point on
horizontal direction. Or when FUNC_SEL = 10, the signal transition will happen immediately when the
vertical compare matches (ie. at the beginning of the line). When needed
TCON_PULSEx.[COMPARATOR_SEL] selects 1 of the 4 comparator outputs as the horizontal
reference.
46.4.2.3 Toggle generator
There’s 1 toggle generator in the TCON which can be used to generate signals which toggles line to line,
or frame to frame, or signal which toggles line to line but polarity changes from frame to frame. The toggle
generator accepts the 4 comparator outputs (TCON_COMP[0:3]) and the 6 pulses (TCON_PULSE[0-5]),
and generates 4 toggle signals (vtgl[0-3]) based on that.
The toggle generator uses a counter (vtgl_counter) and a T flip-flop to generate the 4 toggle signals. The
vtgl_counter takes 1 of the 4 comparator outputs as the clock (h_ref), and 1 of the 6 pulses as the enable
signal (v_ref). The h_ref/v_ref selection is controlled via TCON_CTRL1.H_REF_SEL (see
Section 46.3.3.1, Control Register 1 (TCON_CTRL1)) and TCON_CTRL1.V_REF_SEL.
TCON_CTRL1.VLEN sets the maximun counter value. The vtgl_counter increments at the rising edge of
h_ref when v_ref is high, and it falls back to “0” when the counter value exceeds VLEN. And then the
vtgl[0-2] are generated by decoding the counter value (Equation 46-3 to Equation 46-5).
vtgl[0] = (vtgl_counter == 0)
Eqn. 46-3
vtgl[1] = (vtgl_counter == 1)
Eqn. 46-4
46-24
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor