PXD20RM Datasheet, PDF (862/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

22.1.1 Block Diagram
64-bit
AXI Master
Port
AXI
Address Filter
AXI
Byte Swapper
AXI
Alpha Suppressor /
Color Depth Converter
AXI
1x2
Bus Matrix
AXI
AXI
64-bit AXI to AHB
Master Bridge
AHB
DRAM
AXBS
GFX2D
GXG
32-bit
AHB Slave
Port
AHB
32-bit IPS to AHB
Slave Bridge
IPS
Control
Registers
IPS
Semaphore
Handshake
REQ
GRANT
QuadSPI
AIPS-Lite
Figure 22-1. Graphics Accelerator Gasket Block Diagram
22.1.2 Features
• 32-bit slave port IPS to AHB
• 64-bit master port AXI to AHB
• AXI bus matrix
— Active transactions to only a single slave at a time
— Transactions forwarded in the same order that they were initiated.
• Address Filter with up to four programmable windows
22-2
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor