PXD20RM Datasheet, PDF (410/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

11.3.4.52 Soft Lock L1_TRANSP Register
Figure 11-62 represents the Soft Lock L1_TRANSP register.
Figure 11-62. Soft Lock L1_TRANSP Register
Offset: 0x31C
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0
0000000000
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 11-57. Soft Lock L0_TRANSP Register Field Descriptions
Field
Description
0
Write Enable for Soft Lock Bit SLB_L1_FCOLOR
WEN_L1_FCOLO 1’b1: Value is written to SLB
R
1’b0: SLB is not modified.
1
Write Enable for Soft Lock Bit SLB_L1_BCOLOR
WEN_L1_BCOLO 1’b1: Value is written to SLB
R
1’b0: SLB is not modified.
4
Soft Lock Bit for L1_FCOLOR Register.
SLB_L1_FCOLOR 1’b1: Associated protected register is locked for write access
1’b0: Associated protected register is not locked & writeable
5
Soft Lock Bit for L1_BCOLOR Register.
SLB_L1_BCOLOR 1’b1:Associated protected register is locked for write access
1’b0:Associated protected register is not locked & writeable
11.4 Functional description
The DCU3 is a master on the crossbar switch; it fetches graphic source information directly from memory
and dynamically performs blending and bit-blitting operations before delivering data to a TFT LCD panel.
11-76
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor