PXD20RM Datasheet, PDF (482/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Offsets:
0x000 (CtrlDescL0_1)
0x01C (CtrlDescL1_1)
0x038 (CtrlDescL2_1)
0x054 (CtrlDescL3_1)
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0
W
HEIGHT
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
R0
W
Reset 0
Field
HEIGHT
WIDTH
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0000
WIDTH
000000000000000
Figure 12-4. CtrlDescL0_1 Register
Table 12-6. CtrlDescL0_1 field descriptions
Description
Height of the layer in pixels
Width of the layer (in pixels). The layer width must be in multiples of the number of pixels that
can be stored in 32 bits except for the special case of 1 bit per pixel, and therefore differs
depending on color encoding. For example, if 2 bits per pixel format is used, then the layer width
must be configured in multiples of 16.
12.3.4.2 Control Descriptor L0_2 Register
Figure 12-5 represents the control descriptor L0_2 register.This register sets the origin (top/left) of the
layer associated with the register
12-20
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor