PXD20RM Datasheet, PDF (724/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

18.7 Functional description
The eMIOS200 provides independent channels (UC) that can be configured and accessed by a host MCU.
Up to three time bases can be shared by the channels through three counter buses and each channel can
generate its own time base.
The eMIOS200 module is based on a multi-bus timer architecture in which several timer channels are used
to drive counter buses that are shared among the channels. There are 3 counter buses in the module:
• One global counter bus, shared by all channels
• Two 2 local counter buses, each one dedicated to a slice of 8 channels
Counter bus A is referred to as the global counter bus. Counter buses C and D are the local counter buses.
The eMIOS200 counter buses are driven by channels in specific locations. The global counter bus is driven
by the channel in channel slot [23]. Counter buses C and D are driven by channels in slots [8] and [16],
respectively. Counter bus A drives all channels. Counter bus C drives channels in slots from [8] through
[15]. Counter bus D drives channels in slots from [16] through [23]. Note that the first channel in an
8-channel slice drives the local counter bus for that slice, therefore this channel should not be assigned to
be driven by the same counter bus, otherwise a loop occurs. The eMIOS200 Interrupt request signal, DMA
transfer request signal among others, are wired to a specific channel, thus the chip integrator should
connect those signals having the eMIOS200 channel configuration in mind.
The eMIOS200 block is reset asynchronously. All registers are cleared on reset.
Figure 18-15 describes an eMIOS200 block configured with 32 Unified Channels. Note that the RedLine
is also present. Note also that independent of the configuration the channels are fixed in their slots, thus
for example if channel [2] is not required this location will be empty, meaning that the other channels
locations are not affected. In this case the application software should not access any register located in the
channel[2] memory. Any attempt to access those registers will return no meaningful data and a Transfer
Error will be generated.
18-22
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor