PXD20RM Datasheet, PDF (1206/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

34.4 Functional Description
34.4.1 General
The MC_PCU controls all available power domains on a device mode basis. The PCU_PCONFn registers
specify during which system/user modes a power domain is powered up. The power state for each
individual power domain is reflected by the bits in the PCU_PSTAT register.
On a mode change, the MC_PCU evaluates which power domain(s) must change power state. The power
state is controlled by a state machine (FSM) for each individual power domain (see Figure 34-1) which
ensures a clean and safe state transition.
34.4.2 Reset / Power-On Reset
After any reset, the SoC will transition to the RESET mode during which all power domains are powered
up (see the MC_ME chapter). Once the reset sequence has been completed, the DRUN mode is entered
and software can begin the MC_PCU configuration.
34.4.3 MC_PCU Configuration
Per default, all power domains are powered in all modes other than STANDBY. Software can change the
configuration for each power domain on a mode basis by programming the PCU_PCONFn registers.
Each power domain which is powered down is held in a reset state. Read/write accesses to peripherals in
those power domains will result in a transfer error.
34.4.4 Mode Transitions
On a mode change requested by the MC_ME, the MC_PCU evaluates the power configurations for all
power domains. It compares the settings in the PCU_PCONFn registers for the new mode with the settings
for the current mode. If the configuration for a power domain differs between the modes, a power state
change request is generated. These requests are handled by a finite state machine to ensure a smooth and
safe transition from one power state to another.
34.4.4.1 DRUN, SAFE, TEST, RUN0…3, HALT, and STOP Mode Transition
The DRUN, SAFE, TEST, RUN0…3, HALT, and STOP modes allow an increased power saving. The
level of power saving is software-controllable via the settings in the PCU_PCONFn registers for power
domain #2 onwards. The settings for power domains #0 and #1 can not be changed. Therefore, power
domains #0 and #1 remain connected to the power supply for all modes beside STANDBY.
Figure 34-6 shows an example for a mode transition from RUN0 to HALT and back, which will result in
power domain #2 being powered down during the HALT mode. In this case, PCU_PCONF2.HALT is
programmed to be ‘0’.
34-8
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor