SH7730 Datasheet, PDF (957/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 28 I/O Port
28.14.1 Port N Data Register (PNDR)
PNDR is a register that stores data for pins PTN4 to PTN0. Bits PN4DT to PN0DT correspond to
pins PTN4 to PTN0. For pins that function as general-purpose output pins, a read operation
directly reads out the value from this register. For pins that function as general-purpose input pins,
a read operation reads out the level on the corresponding pin.
Bit: 7
6
5
4
3
2
1
0
— — — PN4DT PN3DT PN2DT PN1DT PN0DT
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R/W R R R R/W
Bit
Bit Name
7 to 5 
4
PN4DT
3
PN3DT
2
PN2DT
1
PN1DT
0
PN0DT
Initial
Value R/W
All 0 R
0
R/W
0
R
0
R
0
R
0
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Table 28.15 shows the function of PNDR.
Table 28.15 Port N Data Register (PNDR) Read/Write Operations
• PN0DT
PNCR State
PNnMD1 PNnMD0
0
0
Pin State
Other function
1
1
0
1
Note: n = 0
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Read
Write
PNDR value The value is written to PNDR, but does
not affect the pin state.
PNDR value The write value is output from the pin.
Pin state
The value is written to PNDR, but does
not affect the pin state.
Pin state
The value is written to PNDR, but does
not affect the pin state.
Rev. 1.00 Sep. 19, 2007 Page 909 of 1136
REJ09B0359-0100