SH7730 Datasheet, PDF (940/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 28 I/O Port
28.5.1 Port D Data Register (PDDR)
PDDR is a register that stores data for pins PTD7 to PTD0. Bits PD7DT to PD0DT correspond to
pins PTD7 to PTD0. For pins that function as general-purpose output pins, a read operation
directly reads out the corresponding value from this register. For pins that function as general-
purpose input pins, a read operation reads out the level on the corresponding pin.
Bit: 7
6
5
4
3
2
1
0
PD7DT PD6DT PD5DT PD4DT PD3DT PD2DT PD1DT PD0DT
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R R/W R R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
7
PD7DT
0
R/W Table 28.6 shows the function of PDDR.
6
PD6DT
0
R
5
PD5DT
0
R/W
4
PD4DT
0
R
3
PD3DT
0
R/W
2
PD2DT
0
R/W
1
PD1DT
0
R/W
0
PD0DT
0
R/W
Table 28.6 Port D Data Register (PDDR) Read/Write Operations
• PD0DT to PG3DT, PD5DT, PD7DT
PDCR State
PDnMD1 PDnMD0 Pin State
Read
0
0
Other function PDDR value
1
Output
1
0
Input (Pull-up
MOS on)
1
Input (Pull-up
MOS off)
Note: n = 0 to 3, 5, 7
PDDR value
Pin state
Pin state
Write
The value is written to PDDR, but does
not affect the pin state.
The write value is output from the pin.
The value is written to PDDR, but does
not affect the pin state.
The value is written to PDDR, but does
not affect the pin state.
Rev. 1.00 Sep. 19, 2007 Page 892 of 1136
REJ09B0359-0100