SH7730 Datasheet, PDF (715/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 22 Serial Communication Interface with FIFO (SCIF)
Table 22.3 Register States in Each Operating Mode
Abbreviation
SCSMR0
SCBRR0
SCSCR0
SCFTDR0
SCFSR0
SCFRDR0
SCFCR0
SCFDR0
SCLSR0
SCSMR1
SCBRR1
SCSCR1
SCFTDR1
SCFSR1
SCFRDR1
SCFCR1
SCFDR1
SCLSR1
SCSMR2
SCBRR2
SCSCR2
SCFTDR2
SCFSR2
SCFRDR2
SCFCR2
SCFDR2
SCLSR2
Power-On Reset Software Standby
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Module Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Rev. 1.00 Sep. 19, 2007 Page 667 of 1136
REJ09B0359-0100