SH7730 Datasheet, PDF (531/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 15 RCLK Watchdog Timer (RWDT)
Section 15 RCLK Watchdog Timer (RWDT)
This LSI includes the RCLK watchdog timer (RWDT).
This LSI can be reset by the overflow of the counter when the value of the counter has not been
updated because of a system runaway.
The RWDT is a single-channel timer that uses a RCLK clock, of which the frequency is 1/1024 of
the clock from the EXTAL pin, as an input and can be used as a watchdog timer.
15.1 Features
• Can be used as a watchdog timer. An internal reset is generated when the counter overflows.
• Choice of eight counter input clocks.
Eight clocks (RCLK/1 to RCLK/4096) that are obtained by dividing the RCLK.
Figures 15.1 shows block diagrams of the RWDT.
RCLK
RWDT
Divider
Reset
control
Clock selector
Internal reset request
RWTCSR
RWTCNT
Peripheral bus
[Legend]
RWTCSR: RCLK watchdog timer control/status register
RWTCNT: RCLK watchdog timer counter
Figure 15.1 Block Diagram of RWDT
Rev. 1.00 Sep. 19, 2007 Page 483 of 1136
REJ09B0359-0100