SH7730 Datasheet, PDF (332/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 11 Bus State Controller (BSC)
11.3.3 Address Map
The external address space has a capacity of 384 Mbytes and is used by dividing eight partial
spaces (address map 1), seven partial spaces (address map 3), or six partial spaces (address map
2). The kind of memory to be connected and the data bus width are specified in each partial space.
The address map for the external address space is shown in tables 11.2 to 11.4.
Table 11.2 Address Space Map 1 (CMNCR.MAP[1:0] = B'00)
Physical Address
Area
Memory to be Connected
Capacity
H'00000000 to H'03FFFFFF Area 0 Normal memory
64 Mbytes
H'04000000 to H'07FFFFFF Area 1
Burst ROM (Asynchronous)
Internal I/O register area*²
64 Mbytes
H'08000000 to H'0BFFFFFF Area 2 Normal memory
64 Mbytes
Byte-selection SRAM
SDRAM
H'0C000000 to H'0FFFFFFF Area 3 Normal memory
64 Mbytes
Byte-selection SRAM
SDRAM
H'10000000 to H'13FFFFFF Area 4 Normal memory
64 Mbytes
Byte-selection SRAM
Burst ROM (Asynchronous)
H'14000000 to H'15FFFFFF Area 5A Normal memory
32 Mbytes
H'16000000 to H'17FFFFFF Area 5B Normal memory
32 Mbytes
Byte-selection SRAM
H'18000000 to H'19FFFFFF Area 6A Normal memory
32 Mbytes
H'1A000000 to H'1BFFFFFF Area 6B Normal memory
32 Mbytes
H'1C000000 to H'1FFFFFFF Area 7
Byte-selection SRAM
Reserved area*¹
64 Mbytes
Notes: 1. Do not access the reserved area. If the reserved area is accessed, the correct
operation cannot be guaranteed.
2. Set the top three bits of the address to 101 to allocate in the P2 space.
Rev. 1.00 Sep. 19, 2007 Page 284 of 1136
REJ09B0359-0100