SH7730 Datasheet, PDF (836/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 24 IrDA Interface (IrDA)
Initial
Bit
Bit Name Value R/W Description
5
IROVE
0
R/W Receive Overrun Error Flag
0: No receive overrun error has occurred.
1: A receive overrun error has occurred.
4
IRFRE
0
R/W Receive Framing Error Flag
0: No receive framing error has occurred.
1: A receive framing error has occurred.
3
IRPRE
0
R/W Receive Parity Error Flag
0: No receive parity error has occurred.
1: A receive parity error has occurred.
2 to 0 —
All 0
R Reserved
These bits are always read as 0. The write value should
always be 0.
Note: Writing to this register clears all error flags.
24.3.12 UART Control Register (IRIF_UART0)
IRIF_UART0 is a register that controls data transmission and reception.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — — — — — — — — TBEC RIE TIE
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R W R/W R/W
Bit
15 to 3
Bit Name
—
Initial
Value
All 0
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Sep. 19, 2007 Page 788 of 1136
REJ09B0359-0100