SH7730 Datasheet, PDF (724/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 22 Serial Communication Interface with FIFO (SCIF)
Initial
Bit
Bit Name Value R/W Description
2

0
R Reserved
This bit is always read as 0. The write value should
always be 0.
1, 0
CKE[1:0] 00
R/W Clock Enable
Select the SCIF clock source and enable or disable
clock output from the SCK pin. Depending on CKE[1:0],
the SCK pin can be used for serial clock output or serial
clock input. CKE[1:0] must be set before selecting the
operating mode of the SCIF by the SCSMR register.
• Asynchronous mode
00: Internal clock; SCK pin is used as an input pin
(input signal is ignored)
01: Setting prohibited
10: External clock; SCK pin used for clock input*¹
11: Setting prohibited
• Clock synchronous mode
00: Setting prohibited
01: Internal clock; SCK pin used for serial clock output*²
10: External clock; SCK pin used for serial clock input
11: Setting prohibited
Notes:1. The input clock frequency is 16 times the bit
rate.
2. The output clock frequency is the same as
the bit rate.
Rev. 1.00 Sep. 19, 2007 Page 676 of 1136
REJ09B0359-0100