SH7730 Datasheet, PDF (625/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Table 20.3 Register States in Each Operating Mode
Section 20 I2C Bus Interface (IIC)
Register Abbreviation Power-On Reset Software Standby Module Standby Sleep
ICCR1_0
Initialized
Retained
Retained
Retained
ICCR2_0
Initialized
Retained
Retained
Retained
ICMR_0
Initialized
Retained
Retained
Retained
ICIER_0
Initialized
Retained
Retained
Retained
ICSR_0
Initialized
Retained
Retained
Retained
SAR_0
Initialized
Retained
Retained
Retained
ICDRT_0
Initialized
Retained
Retained
Retained
ICDRR_0
Initialized
Retained
Retained
Retained
NF2CYC_0
Initialized
Retained
Retained
Retained
ICCR1_1
Initialized
Retained
Retained
Retained
ICCR2_1
Initialized
Retained
Retained
Retained
ICMR_1
Initialized
Retained
Retained
Retained
ICIER_1
Initialized
Retained
Retained
Retained
ICSR_1
Initialized
Retained
Retained
Retained
SAR_1
Initialized
Retained
Retained
Retained
ICDRT_1
Initialized
Retained
Retained
Retained
ICDRR_1
Initialized
Retained
Retained
Retained
NF2CYC_1
Initialized
Retained
Retained
Retained
Rev. 1.00 Sep. 19, 2007 Page 577 of 1136
REJ09B0359-0100