SH7730 Datasheet, PDF (894/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
(3) Serial Data Reception
An example of data receive processing in smart card mode is shown in figure 25.6.
(a) Follow the Initialization procedure described in section 25.4.5, Data Transmit/Receive
Operation to initialize the smart card interface.
(b) Confirm that the PER, ORER, and WAIT_ER flags in SCSSR are 0. If one of these flags is set,
after performing the prescribed receive error processing, clear the PER, ORER, and WAIT_ER
flags to 0.
(c) Repeat (b) and (c) in the figure until it can be confirmed that the RDRF flag is set to 1.
(d) Read received data from SCRDR.
(e) When receiving data continuously, return to (b).
(f) Set the WECC bit in SCSCMR as required. When reception is ended, clear the RE bit to 0.
Interrupt processing can be performed in the above series of processing.
When the RIE bit is set to 1 and the EIO bit is cleared to 0 and if the RDRF flag is set to 1, a
receive data full interrupt (RXI) request is issued. If the RIE bit is set to 1, an error occurs during
reception, and either the ORER, PER, or WAIT_ER flag is set to 1, a transmit/receive error
interrupt (ERI) request is issued.
For details, refer to Interrupt Operations in section 25.4.5, Data Transmit/Receive Operation.
If a parity error occurs during reception and the PER flag is set to 1, in T = 0 mode the received
data is not transferred to SCRDR, and so this data cannot be read. In T = 1 mode, received data is
transferred to SCRDR, and so this data can be read.
Rev. 1.00 Sep. 19, 2007 Page 846 of 1136
REJ09B0359-0100