SH7730 Datasheet, PDF (704/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 21 Serial I/O with FIFO (SIOF)
21.4.9 Transmit and Receive Timing
Examples of the SIOF serial transmission and reception are shown in figures 21.13 to 21.20.
(1) 8-bit Monaural Data (1)
Synchronous pulse method, falling edge sampling, slot No.0 used for transmit and receive data, an
frame length = 8 bits
1 frame
SIOFSCK
SIOFSYNC
SIOFTXD
SIOFRXD
L-channel data
Slot No.0
1-bit delay
Specifications: TRMD[1:0] = 00 or 10, REDG = 0,
FL[3:0] = 0000 (frame length: 8 bits)
TDLE = 1,
TDLA[3:0] = 0000, TDRE = 0, TDRA[3:0] = 0000,
RDLE = 1,
RDLA[3:0] = 0000, RDRE = 0, RDRA[3:0] = 0000,
CD0E = 0,
CD0A[3:0] = 0000, CD1E = 0, CD1A[3:0] = 0000
Figure 21.13 Transmit and Receive Timing (8-Bit Monaural Data (1))
Rev. 1.00 Sep. 19, 2007 Page 656 of 1136
REJ09B0359-0100