SH7730 Datasheet, PDF (597/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 18 Timer Unit (TMU)
Section 18 Timer Unit (TMU)
This LSI includes a three-channel 32-bit timer unit (TMU).
18.1 Features
• Each channel is provided with an auto-reload 32-bit down counter.
• All channels are provided with 32-bit constant registers and 32-bit down counters that can be
read or written to at any time.
• All channels generate interrupt requests when the 32-bit down counter underflows
(H'00000000 → H'FFFFFFFF)
• Allows selection among five counter input clocks: Pφ/4, Pφ/16, Pφ/64, Pφ/256, and Pφ/1024
TIMS3A0A-000020050200
Rev. 1.00 Sep. 19, 2007 Page 549 of 1136
REJ09B0359-0100