SH7730 Datasheet, PDF (105/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 3 Instruction Set
Item
Format
Description
Privileged mode
"Privileged" means the instruction can only be executed
in privileged mode.
T bit
Value of T bit after —: No change
instruction execution
Note: Scaling (×1, ×2, ×4, or ×8) is executed according to the size of the instruction operand.
Table 3.4 Fixed-Point Transfer Instructions
Instruction
Operation
Instruction Code
MOV #imm,Rn
imm → sign extension → Rn
1110nnnniiiiiiii
MOV.W @(disp*,PC), Rn (disp × 2 + PC + 4) → sign
extension → Rn
1001nnnndddddddd
MOV.L @(disp*,PC), Rn (disp × 4 + PC & H'FFFF FFFC 1101nnnndddddddd
+ 4) → Rn
MOV Rm,Rn
Rm → Rn
0110nnnnmmmm0011
MOV.B Rm,@Rn
Rm → (Rn)
0010nnnnmmmm0000
MOV.W Rm,@Rn
Rm → (Rn)
0010nnnnmmmm0001
MOV.L Rm,@Rn
Rm → (Rn)
0010nnnnmmmm0010
MOV.B @Rm,Rn
(Rm) → sign extension → Rn 0110nnnnmmmm0000
MOV.W @Rm,Rn
(Rm) → sign extension → Rn 0110nnnnmmmm0001
MOV.L @Rm,Rn
(Rm) → Rn
0110nnnnmmmm0010
MOV.B Rm,@-Rn
Rn-1 → Rn, Rm → (Rn)
0010nnnnmmmm0100
MOV.W Rm,@-Rn
Rn-2 → Rn, Rm → (Rn)
0010nnnnmmmm0101
MOV.L Rm,@-Rn
Rn-4 → Rn, Rm → (Rn)
0010nnnnmmmm0110
MOV.B @Rm+,Rn
(Rm)→ sign extension → Rn,
Rm + 1 → Rm
0110nnnnmmmm0100
MOV.W @Rm+,Rn
(Rm) → sign extension → Rn,
Rm + 2 → Rm
0110nnnnmmmm0101
MOV.L @Rm+,Rn
(Rm) → Rn, Rm + 4 → Rm
0110nnnnmmmm0110
MOV.B R0,@(disp*,Rn) R0 → (disp + Rn)
10000000nnnndddd
MOV.W R0,@(disp*,Rn) R0 → (disp × 2 + Rn)
10000001nnnndddd
MOV.L Rm,@(disp*,Rn) Rm → (disp × 4 + Rn)
0001nnnnmmmmdddd
MOV.B @(disp*,Rm),R0
(disp + Rm) → sign extension → 10000100mmmmdddd
R0
Privileged T Bit
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Rev. 1.00 Sep. 19, 2007 Page 57 of 1136
REJ09B0359-0100