SH7730 Datasheet, PDF (1014/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 29 Pin Function Controller (PFC)
Initial
Bit
Bit Name Value R/W Description
1
HIZC1
0
R/W Controls high impedance of the PTC1 pin
0: I/O buffer operates normally
1: Input of the I/O buffer is disabled and output is high
impedance
0
HIZC0
0
R/W Controls high impedance of the PTC0 pin
0: I/O buffer operates normally
1: Input of the I/O buffer is disabled and output is high
impedance
29.2.24 I/O Buffer Hi-Z Control Register D (HIZCRD)
HIZCRD is a 16-bit readable/writable register that controls high impedance states of pins on a per-
function basis.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — — HIZD8 HIZD7 HIZD6 HIZD5 HIZD4 HIZD3 HIZD2 HIZD1 HIZD0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 9 
8
HIZD8
7
HIZD7
Initial
Value
All 0
0
0
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Controls high impedance of the IRQOUT pin
0: I/O buffer operates normally
1: Input of the I/O buffer is disabled and output is high
impedance
R/W Controls high impedance of the PTJ5 pin
0: I/O buffer operates normally
1: Input of the I/O buffer is disabled and output is high
impedance
Rev. 1.00 Sep. 19, 2007 Page 966 of 1136
REJ09B0359-0100