SH7730 Datasheet, PDF (929/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 27 D/A Converter (DAC)
27.3.1 D/A Data Registers 0 and 1 (DADR0, DADR1)
DADR0 and DADR1 are 16-bit readable/writable registers that store data for D/A conversion.
When the D/A output enable bits (DAOE1, DAOE0) of the DA control register (DACR) are set to
1, the contents of the D/A data register are converted and output to analog output pins (DA0,
DA1). The D/A data register is initialized to H'0000 at reset. Note that the D/A data register is not
initialized upon entering the software standby, module standby, or hardware standby mode.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
——————
DAD[9:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Initial
Bit
Bit Name Value R/W Description
15 to 10 
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
9 to 0 DAD[9:0] H'000 R/W 10-bit register that stores data for D/A conversion.
27.3.2 D/A Control Register (DACR)
The DACR register is a 16-bit readable/writable register that controls D/A converter operation.
The DACR is initialized to H'0000 at reset. Note that the DACR is not initialized in software
standby or module standby mode.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
— — — — — — — — DAOE1 DAOE0 — — — — — DAE
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R/W R/W R R R R R R/W
Initial
Bit
Bit Name Value R/W Description
15 to 8 
All 0 R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Sep. 19, 2007 Page 881 of 1136
REJ09B0359-0100