SH7730 Datasheet, PDF (321/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 10 Interrupt Controller (INTC)
10.5.4 Interrupt Disabling Function in User Mode
Setting the interrupt mask level in USERIMASK disables interrupts having an equal or lower
priority level than the specified mask level. This function can disable less-urgent interrupts in a
task (such as device driver) operating in user mode to accelerate urgent processing.
USERIMASK is allocated to a different 64-Kbyte page than where the other INTC registers are
allocated. When accessing this register in user mode, translate the address through the MMU. In
the system that uses a multitasking OS, processes that can access USERIMASK must be
controlled by using memory protection functions of the MMU. When terminating the task or
switching to another task, be sure to clear USERIMASK to 0 before quitting the task. If the
UIMASK bits are left set to a non-zero value, interrupts which are not higher in priority than the
UIMASK level are held disabled, and correct operation may not be performed (for example, the
OS cannot switch tasks).
A sample sequence of user-mode interrupt disabling operation is described below.
1. Classify interrupts into A and B shown below, and assign higher interrupt levels to A than B.
A. Interrupts that should be accepted in the device driver
(interrupts used by the OS, such as timer interrupts)
B. Interrupts that should be disabled in the device driver
2. Make the MMU settings so that the address space including USERIMASK can only be
accessed by the device driver in which interrupts should be disabled.
3. Branch to the device driver.
4. Specify the UIMASK bits so that interrupts B are masked in the device driver operating in user
mode.
5. Perform urgent processing in the device driver.
6. Clear the UIMASK bits to 0 to return from the device driver processing.
Rev. 1.00 Sep. 19, 2007 Page 273 of 1136
REJ09B0359-0100