SH7730 Datasheet, PDF (1086/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 32 List of Registers
32.2 Register States in Each Operating Mode
Table 32.2 Register States in Each Operating Mode (1)
Module
Exception Handling
MMU
Cache
Register
Power-On
Abbreviation Reset
TRA
Initialized
EXPEVT
Initialized
INTEVT
Initialized
EXPMASK Initialized
PTEH
Initialized
PTEL
Initialized
TTB
Initialized
TEA
Initialized
MMUCR
Initialized
PASCR
Initialized
IRMCR
Initialized
PTEA
Initialized
CCR
Initialized
QACR0
Initialized
QACR1
Initialized
RAMCR
Initialized
Manual Reset Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Retained
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Initialized
Retained
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Rev. 1.00 Sep. 19, 2007 Page 1038 of 1136
REJ09B0359-0100