SH7730 Datasheet, PDF (556/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 16 16-Bit Timer Pulse Unit (TPU)
16.5 Operation
16.5.1 Overview
Operation overview for each mode is as follows.
(1) Ordinary Operation
Each channel is provided with TPUn_TCNT and TPUn_TGR registers. TPUn_TCNT performs
up-counting, and is also capable of free-running operation, periodic counting, and external event
counting.
(2) Buffer Operation
When a compare match occurs, the buffer register value in the corresponding channel is
transferred to TPUn_TGR. Updating timing to rewrite from buffer registers can be selected either
when a compare match occurs or when the counter is cleared.
(3) PWM Mode
In PWM mode, PWM waveform is output. The output level can be set by TPUn_TGR. PWM
waveform, whose duty is in the range of 0 to 100%, can be output by the settings of TPUn_TGRA
and TPUn_TGRB.
Rev. 1.00 Sep. 19, 2007 Page 508 of 1136
REJ09B0359-0100