SH7730 Datasheet, PDF (879/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
25.3.8 Receive Data Register (SCRDR)
SCRDR is an 8-bit read-only register that stores received serial data.
When reception of one byte of serial data is completed, the smart card interface transfers the
received serial data from the receive shift register (SCRSR) to SCRDR for storage, and completes
the receive operation. Thereafter, SCRSR can receive data. In this way, SCRSR and SCRDR
constitute a double buffer, enabling continuous reception of data.
Bit: 7
6
5
4
3
2
1
0
SCRDR[7:0]
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R R R
Bit
7 to 0
Bit Name
Initial
Value
SCRDR[7:0] H'00
R/W Description
R Receive Data
Store received serial data.
25.3.9 Smart Card Mode Register (SCSCMR)
SCSCMR is an 8-bit readable/writable register that selects functions of the smart card interface.
Bit: 7
6
5
4
3
2
1
0
HOEN LCB PB WECC SDIR SINV RST SMIF
Initial value: 0
0
0
0
0
0
0
1
R/W: R/W R/W R/W R/W R/W R/W R/W R
Initial
Bit
Bit Name Value R/W Description
7
HOEN
0
R/W High Output Enable
Enables or disables temporary output of high level after
transmission of one frame of data has finished.
0: Disables the high-output function (initial value)
1: Enables the high-output function
Rev. 1.00 Sep. 19, 2007 Page 831 of 1136
REJ09B0359-0100