SH7730 Datasheet, PDF (892/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
(2) Serial Data Transmission
Data transmission in smart card mode includes error signal sampling and retransmit processing.
An example of transmit processing is shown in figure 25.5.
(a) Follow the Initialization procedure described in section 25.4.5, Data Transmit/Receive
Operation to initialize the smart card interface.
(b) Confirm that the ERS bit (error flag) in SCSSR is cleared to 0.
(c) Repeat (b) and (c) until it can be confirmed that the TDRE flag in SCSSR is set to 1.
(d) Write transmit data to SCTDR, and perform transmission. At this time, the TDRE flag is
automatically cleared to 0. When transmission of the start bit is started, the TEND flag is
automatically cleared to 0, and the TDRE flag is automatically set to 1.
(e) When performing continuous data transmission, return to (b).
(f) Set the WECC bit in SCSCMR as required. When transmission is ended, clear the TE bit to 0.
Interrupt processing can be performed in the above series of processing.
When the TIE bit is set to 1 to enable interrupt requests and if transmission is started and the
TDRE flag is set to 1, a transmit data empty interrupt (TXI) request is issued. When the RIE bit is
set to 1 to enable interrupt requests and if an error occurs during transmission and the ERS flag is
set to 1, a transmit/receive error interrupt (ERI) request is issued.
For details, refer to Interrupt Operations in section 25.4.5, Data Transmit/Receive Operation.
Rev. 1.00 Sep. 19, 2007 Page 844 of 1136
REJ09B0359-0100