SH7730 Datasheet, PDF (1085/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 32 List of Registers
Table 32.1 Register Configuration (3)
Module
Name
Abbreviation
R/W
P4 Address*
Area 7
Address*
Access
Size
UBC
Match condition setting register 0
CBR0
R/W
H'FF20 0000
H'1F20 0000
32
Match operation setting register 0
CRR0
R/W
H'FF20 0004
H'1F20 0004
32
Match address setting register 0
CAR0
R/W
H'FF20 0008
H'1F20 0008
32
Match address mask setting register 0
CAMR0
R/W
H'FF20 000C
H'1F20 000C 32
Match condition setting register 1
CBR1
R/W
H'FF20 0020
H'1F20 0020
32
Match operation setting register 1
CRR1
R/W
H'FF20 0024
H'1F20 0024
32
Match address setting register 1
CAR1
R/W
H'FF20 0028
H'1F20 0028
32
Match address mask setting register 1
CAMR1
R/W
H'FF20 002C
H'1F20 002C 32
Match data setting register 1
CDR1
R/W
H'FF20 0030
H'1F20 0030
32
Match data mask setting register 1
CDMR1
R/W
H'FF20 0034
H'1F20 0034
32
Execution count break register 1
CETR1
R/W
H'FF20 0038
H'1F20 0038
32
Channel match flag register
CCMFR
R/W
H'FF20 0600
H'1F20 0600
32
Break control register
CBCR
R/W
H'FF20 0620
H'1F20 0620
32
H-UDI
Instruction register
SDIR
R
H'FC11 0000
H'1C11 0000 16
Data register H
SDDR/SDDRH
R/W
H'FC11 0008
H'1C11 0008 32/16
Data register L
SDDRL
R/W
H'FC11 000A
H'1C11 000A 16
Interrupt source register
SDINT
R/W
H'FC11 0018
H'1C11 0018 16
Bypass register
SDBPR




Note: * P4 addresses are used when area P4 in the virtual address space is used, and area 7
addresses are used when accessing the register through area 7 in the physical address
space using the TLB.
Rev. 1.00 Sep. 19, 2007 Page 1037 of 1136
REJ09B0359-0100