SH7730 Datasheet, PDF (18/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

17.5.5 Usage of 30-Second Adjustment............................................................................ 547
Section 18 Timer Unit (TMU)........................................................................... 549
18.1 Features............................................................................................................................. 549
18.2 Register Descriptions........................................................................................................ 551
18.2.1 Timer Start Register (TSTR).................................................................................. 552
18.2.2 Timer Control Registers (TCR) ............................................................................. 553
18.2.3 Timer Constant Registers (TCOR)......................................................................... 554
18.2.4 Timer Counters (TCNT) ........................................................................................ 555
18.3 Operation .......................................................................................................................... 556
18.3.1 Counter Operation.................................................................................................. 556
18.4 Interrupts........................................................................................................................... 558
18.4.1 Status Flag Set Timing ........................................................................................... 558
18.4.2 Status Flag Clear Timing ....................................................................................... 558
18.4.3 Interrupt Sources and Priorities.............................................................................. 559
18.5 Usage Notes ...................................................................................................................... 559
18.5.1 Writing to Registers ............................................................................................... 559
18.5.2 Reading Registers .................................................................................................. 559
Section 19 Compare Match Timer (CMT) ........................................................ 561
19.1 Features............................................................................................................................. 561
19.2 Input/output Pins............................................................................................................... 563
19.3 Register Descriptions........................................................................................................ 563
19.3.1 Compare Match Timer Start Register (CMSTR) ................................................... 565
19.3.2 Compare Match Timer Control/Status Register (CMCSR).................................... 565
19.3.3 Compare Match Timer Counter (CMCNT)............................................................ 568
19.3.4 Compare Match Timer Constant Register (CMCOR)............................................ 568
19.4 Operation .......................................................................................................................... 569
19.4.1 Counter Operation.................................................................................................. 569
19.4.2 Counter Size........................................................................................................... 570
19.4.3 Timing for Counting by CMCNT .......................................................................... 570
19.4.4 DMA Transfer Requests and Internal Interrupt Requests for the CPU .................. 571
19.4.5 Compare Match Flag Set Timing ........................................................................... 571
Section 20 I²C Bus Interface (IIC)..................................................................... 573
20.1 Features............................................................................................................................. 573
20.2 Input/Output Pins.............................................................................................................. 575
20.3 Register Descriptions........................................................................................................ 576
20.3.1 I²C Bus Control Register 1 (ICCR1) ...................................................................... 578
20.3.2 I²C Bus Control Register 2 (ICCR2) ...................................................................... 580
Rev. 1.00 Sep. 19, 2007 Page xviii of xlviii