SH7730 Datasheet, PDF (950/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 28 I/O Port
28.10.1 Port J Data Register (PJDR)
PJDR is a register that stores data for pins PTJ7 to PTJ0. Bits PJ7DT to PJ0DT correspond to pins
PTJ7 to PTJ0. For pins that function as general-purpose output pins, a read operation directly
reads out the value from this register. For pins that function as general-purpose input pins, a read
operation reads out the level on the corresponding pin.
Bit: 7
6
5
4
3
2
1
0
PJ7DT PJ6DT PJ5DT PJ4DT PJ3DT PJ2DT PJ1DT PJ0DT
Initial value: 0
0
0
R/W: R/W R/W R
0
0
0
0
0
R R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
7
PJ7DT
0
R/W Table 28.11 shows the function of PJDR.
6
PJ6DT
0
R/W
5
PJ5DT
0
R
4
PJ4DT
0
R
3
PJ3DT
0
R/W
2
PJ2DT
0
R/W
1
PJ1DT
0
R/W
0
PJ0DT
0
R/W
Table 28.11 Port J Data Register (PJDR) Read/Write Operations
• PJ0DT to PJ3DT, PJ6DT, PJ7DT
PJCR State
PJnMD1 PJnMD0
0
0
Pin State
Other function
1
Output
1
0
Input (Pull-up
MOS on)
1
Input (Pull-up
MOS off)
Note: n = 0 to 3, 6, 7
Read
PJDR value
PJDR value
Pin state
Pin state
Write
The value is written to PJDR, but does
not affect the pin state.
The write value is output from the pin.
The value is written to PJDR, but does
not affect the pin state.
The value is written to PJDR, but does
not affect the pin state.
Rev. 1.00 Sep. 19, 2007 Page 902 of 1136
REJ09B0359-0100