SH7730 Datasheet, PDF (1091/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Module
TPU0
Register
Abbreviation
TPU0_TIER0
TPU0_TSR0
TPU0_TCNT0
TPU0_TGR0A
TPU0_TGR0B
TPU0_TGR0C
TPU0_TGR0D
TPU0_TCR1
TPU0_TMDR1
TPU0_TIOR1
TPU0_TIER1
TPU0_TSR1
TPU0_TCNT1
TPU0_TGR1A
TPU0_TGR1B
TPU0_TGR1C
TPU0_TGR1D
TPU0_TCR2
TPU0_TMDR2
TPU0_TIOR2
TPU0_TIER2
TPU0_TSR2
TPU0_TCNT2
TPU0_TGR2A
TPU0_TGR2B
TPU0_TGR2C
TPU0_TGR2D
TPU0_TCR3
TPU0_TMDR3
TPU0_TIOR3
TPU0_TIER3
Power-On
Reset
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Software
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Section 32 List of Registers
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Rev. 1.00 Sep. 19, 2007 Page 1043 of 1136
REJ09B0359-0100