SH7730 Datasheet, PDF (946/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 28 I/O Port
28.8.1 Port G Data Register (PGDR)
PGDR is a register that stores data for pins PTG5 to PTG0. Bits PG5DT to PG0DT correspond to
pins PTG5 to PTG0. For pins that function as general-purpose output pins, a read operation
directly reads out the value from this register. For pins that function as general-purpose input pins,
a read operation reads out the level on the corresponding pin.
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
— PG5DT PG4DT PG3DT PG2T PG1DT PG0DT
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value
7, 6 
All 0
5
PG5DT 0
4
PG4DT 0
3
PG3DT 0
2
PG2DT 0
1
PG1DT 0
0
PG0DT 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Table 28.9 shows the function of PGDR.
R/W
R/W
R/W
R/W
R/W
Table 28.9 Port G Data Register (PGDR) Read/Write Operations
PGCR State
PGnMD1 PGnMD0
0
0
Pin State
Other function
1
1
0
1
Note: n = 0 to 5
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
Read
Write
PGDR value The value is written to PGDR, but does
not affect the pin state.
PGDR value The write value is output from the pin.
Pin state
The value is written to PGDR, but does
not affect the pin state.
Pin state
The value is written to PGDR, but does
not affect the pin state.
Rev. 1.00 Sep. 19, 2007 Page 898 of 1136
REJ09B0359-0100