SH7730 Datasheet, PDF (884/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 25 SIM Card Module (SIM)
Initial
Bit
Bit Name
Value R/W Description
15 to 11 
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
10 to 0 SCSMPL[10:0] H'173 R/W Setting for Number of Serial Clock Cycles per Etu
The number of serial clock cycles per etu is (SCSMPL
value + 1). The value written to SCSMPL should always
be H'0007 or greater.
25.3.14 DMA Enable Register (SCDMAEN)
SCDMAEN enables or disables DMA transfer.
Bit: 7
6
5
4
3
2
1
0
RDMAE TDMAE —
—
—
—
—
—
Initial value: 1
1
0
0
0
0
0
0
R/W: R/W R/W R R R R R R
Bit
Bit Name
7
RDMAE
6
TDMAE
5 to 0 
Initial
Value R/W Description
1
R/W Reception DMA Enable Flag
Enables or disables DMA transfer at reception.
0: Disables DMA transfer during reception
1: Enables DMA transfer during reception
1
R/W Transmission DMA Enable Flag
Enables or disables DMA transfer at transmission.
0: Disables DMA transfer during transmission
1: Enables DMA transfer during transmission
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Sep. 19, 2007 Page 836 of 1136
REJ09B0359-0100