SH7730 Datasheet, PDF (1059/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 31 User Debugging Interface (H-UDI)
Section 31 User Debugging Interface (H-UDI)
The H-UDI is a serial interface which is based on the JTAG (IEEE 1149.4: IEEE Standard Test
Access Port and Boundary-Scan Architecture) standard. The H-UDI is also used for emulator
connection.
31.1 Features
The H-UDI is a serial interface which is based on the JTAG standard. The H-UDI is also used for
emulator connection. When using an emulator, H-UDI functions should not be used. Refer to the
appropriate emulator users manual for the method of connecting the emulator.
The H-UDI has six pins: TCK, TMS, TDI, TDO, TRST, and ASEBRK/BRKACK. The pin
functions except ASEBRK/BRKACK and serial communications protocol are based on the JTAG
standard. This LSI has additional six pins for emulator connection: (AUDSYNC, AUDCK, and
AUDATA3 to AUDATA0).
Figure 31.1 shows a block diagram of the H-UDI.
The TAP (Test Access Port) controller and five registers (SDBPR, SDIR, SDDRH, SDDRL, and
SDINT). SDBPR supports the JTAG bypass mode, SDIR is used for commands, SDDR is used for
data, and SDINT is used for H-UDI interrupts. SDIR is directly accessed from the TDI and TDO
pins.
The TAP controller and control registers are initialized by driving the TRST pin low or by
applying the TCK signal for five or more clock cycles with the TMS pin set to 1. This
initialization sequence is independent of the reset pin for this LSI. Other circuits are initialized by
a normal reset.
Rev. 1.00 Sep. 19, 2007 Page 1011 of 1136
REJ09B0359-0100