SH7730 Datasheet, PDF (1125/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 33 Electrical Characteristics
CKO
A23 to A0
A12/A11*¹
CSn
RDWR
RAS
CAS
Tr
Trw
Tc
Tcw
Td1
Tde
Tap
tAD1
tAD1
tCSD1
tAD1
Row
Address
tAD1
Column
Address
tAD1
READA
Command
tAD1
tAD1
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tCASD1
tCASD1
tCASD1
tRASD1
tCASD1
tDQMD1
tDQMD1
DQMx
tRDS2
D15 to D0
tBSD
tBSD
tRDH2
tBSD
BS
CKE
tDACD
(High)
tDACD
tDACD
DACKn*²
Notes: 1. Address pin that is connected to A10 of SDRAM.
2. Waveform when active low is specified for DACKn.
Figure 33.17 Single Read Bus Cycle of SDRAM
(Auto Precharge Mode, CAS Latency 2, TRCD = 2 Cycles, TRP = 2 Cycles)
Rev. 1.00 Sep. 19, 2007 Page 1077 of 1136
REJ09B0359-0100