SH7730 Datasheet, PDF (65/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 1 Overview
Pin No. Pin Name
I/O
163
VccQ

164
SCIF0_TXD/IrDA0_TXD/PTQ2 O/O/IO
165
SCIF0_SCK/PTQ0
IO/IO
166
SCIF1_TXD/IrDA1_TXD/PTR2 O/O/IO
167
SCIF1_SCK/PTR0
IO/IO
168
SCIF2_TXD/SIOF_TXD/PTS2 O/O/IO
169
SCIF2_SCK/SIOF_SCK/PTS0 IO/IO/IO
170
SCIF2_RTS/SIOF_SYNC/
O/IO/IO
PTS4
171
SCIF0_RXD/IrDA0_RXD/PTQ1 I/I/I
172
SCIF1_RXD/IrDA1_RXD/PTR1 I/I/I
173
Vss

174
SCIF2_RXD/SIOF_RXD/PTS1 I/I/I
175
Vcc

176
SCIF2_CTS/SIOF_MCK/
I/I/I/I
IRQ5/PTS3
177
SCIF5_RTS/PINTA7/PTC7 O/I/IO
178
SCIF5_CTS/PINTA6/PTC6 I/I/IO
179
SCIF4_RTS/PINTA5/PTC5 O/I/IO
180
SCIF4_CTS/PINTA4/PTC4 I/I/IO
181
VssQ

182
SCIF3_TXD/SIM_D/PTD3
O/IO/IO
Description
Power
Supply
Source
I/O power supply (3.3 V)
VccQ
SCIF0 transmit data/IrDA transmit data/
IO port Q
VccQ
SCIF0 serial clock/IO port Q
VccQ
SCIF1 transmit data/IrDA transmit data/
IO port R
VccQ
SCIF1 serial clock/IO port R
VccQ
SCIF2 transmit data/SIOF transmit data/
IO port S
VccQ
SCIF2 serial clock/SIOF serial clock/
IO port S
VccQ
SCIF2 transmit request/SIOF frame sync
signal/IO port S
VccQ
SCIF0 receive data/IrDA receive data/
input port Q
VccQ
SCIF1 receive data/IrDA receive data/
input port R
VccQ
Internal ground (0 V)
Vcc
SCIF2 receive data/SIOF receive data/
input port S
VccQ
Internal power supply (1.2 V)
VCC
SCIF2 transmit clear/SIOF master clock VccQ
input/external interrupt request/input port S
SCIF5 transmit request/port interrupt/
IO port C
VccQ
SCIF5 transmit clear/port interrupt/
IO port C
VccQ
SCIF4 transmit request/port interrupt/
IO port C
VccQ
SCIF4 transmit clear/port interrupt/
IO port C
VccQ
I/O ground (0 V)
VccQ
SCIF3 transmit data/smart card transmit
and receive data/IO port D
VccQ
Rev. 1.00 Sep. 19, 2007 Page 17 of 1136
REJ09B0359-0100