SH7730 Datasheet, PDF (435/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 11 Bus State Controller (BSC)
CKO
A25 to A0
T1
T2
CSn
WEn
RDWR
Read RD
D31 to D0
RDWR
Write _RD
D31 to D0
High
BS
DACKn*
Note: * The waveform for DACKn is when active low is specified.
Figure 11.33 Basic Access Timing for Byte-Selection SRAM (BAS = 1)
Rev. 1.00 Sep. 19, 2007 Page 387 of 1136
REJ09B0359-0100