SH7730 Datasheet, PDF (535/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

Section 15 RCLK Watchdog Timer (RWDT)
15.3.3 Notes on Register Access
The writing procedure to RWTCNT and RWTCSR differs from that of other registers with the
purpose of preventing an unintended write. The procedure for writing to these registers is given
below.
Writing to RWTCNT and RWTCSR:
• These registers must be written by a word transfer instruction. They cannot be written by a
byte or longword transfer instruction.
• When writing to RWTCNT, set the upper byte to H'5A and transfer the lower byte as the write
data. When writing to RWTCSR, set the upper byte to H'A5 and transfer the lower byte as the
write data.
RWTCNT write
15
Address: H'A4520000
87
0
H'5A
Write data
RWTCSR write
15
Address: H'A4520004
87
0
H'A5
Write data
Figure 15.2 Writing to RWTCNT and RWTCSR
Rev. 1.00 Sep. 19, 2007 Page 487 of 1136
REJ09B0359-0100