SH7730 Datasheet, PDF (529/1188 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7780 Series

14.4.5 Mode Transitions
Figure 14.1 shows the mode transitions.
Section 14 Reset and Power-Down Modes
Power-off state
(1)
(2)
Software standby
Normal operation
Multiplication ratio change
Sleep
Module standby
14.4.6
(1) PLL oscillation settling time and power
supply settling time
(2) PLL oscillation settling time
Figure 14.1 Mode Transition Diagram
Output Pins Change Timing
Figure 14.2 shows the state of output pins at a power-on reset.
CKO
RESETOUT
STATUS0
RESETP
RESETP low period*¹ Oscillation settling time*²
Notes: 1. Hold the RESETP pin low for at least 1 ms.
2. 300 µs is requried as the PLL oscillation settling time.
Figure 14.2 State of Output Pins at Power-On Reset
Rev. 1.00 Sep. 19, 2007 Page 481 of 1136
REJ09B0359-0100